# NVIDIA Developer Blog
> Technology company that designs powerful computer chips used for video games, data centers, and artificial intelligence.

## Articles

### [ModelExpress: Distributing Model Artifacts at the Speed of Light](https://yomu.fyi/post/modelexpress-distributing-model-artifacts-at-the-speed-of-light.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Elizabeth Goodman
- Published: Jul 24, 2026

Distributing large language model weights and JIT kernel caches across clusters imposes high latency on cold starts, autoscaling, and reinforcement learning loops. NVIDIA ModelExpress minimizes this delay by identifying existing compatible weight replicas across the cluster rather than treating every worker as an independent cold start. Initial replicas bootstrap by streaming directly from remote object storage into GPU memory or bypassing host staging using GPUDirect Storage. Subsequent replicas load pre-processed weights and kernel caches directly from serving peers over peer-to-peer RDMA via the NVIDIA Inference Xfer Library. In testing on DeepSeek-V4 Pro, this peer-to-peer artifact distribution transferred weights and caches in under ten seconds, reducing overall replica startup time from eight minutes to one minute and forty-four seconds.


### [Debugging Ray Tracing Applications Using NVIDIA OptiX Toolkit](https://yomu.fyi/post/debugging-ray-tracing-applications-using-nvidia-optix-toolkit.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Tanya Lenz
- Published: Jul 23, 2026

NVIDIA OptiX ray tracing applications often present difficult debugging challenges, including invalid API arguments, black frames, and concurrency issues across thousands of GPU threads. The open-source NVIDIA OptiX Toolkit addresses these diagnostic hurdles by offering unified error checking and targeted device-side debug logging. Host-side macros like OTK\_ERROR\_CHECK wrap OptiX, CUDA runtime, and CUDA driver API calls to enforce uniform error validation while capturing file and line diagnostics. For device-side troubleshooting, the toolkit introduces a DebugLocation utility to isolate logging to specific launch indices instead of flooding the output stream with concurrent thread data. This device mechanism also supports interactive one-shot debug dumps and screen highlights around the inspected pixel.


### [Start Customizing NVIDIA Nemotron 3 Nano with Prime Intellect Lab in Minutes](https://yomu.fyi/post/start-customizing-nvidia-nemotron-3-nano-with-prime-intellect-lab-in-m.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Chris Alexiuk
- Published: Jul 23, 2026

Adapting open models to specialized tasks often requires significant infrastructure, technical expertise, and GPU resources. This tutorial demonstrates how developers can customize NVIDIA Nemotron 3 Nano using Prime Intellect Lab for hosted reinforcement learning with verifiable rewards. The workflow establishes a baseline evaluation on a Python Math task, trains a LoRA adapter using a TOML configuration, and reevaluates performance. Across 32 held-out problems capped at five assistant turns, the model improves its accuracy from 21.9% to 90.6% for less than five dollars in compute spend. The same hosted training approach applies to larger models in the family, including Nemotron 3 Super and Nemotron 3 Ultra.


### [Setting a World Record for MoE Pre-Training on NVIDIA GB300 NVL72](https://yomu.fyi/post/setting-a-world-record-for-moe-pre-training-on-nvidia-gb300-nvl72.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Kirthi Devleker
- Published: Jul 21, 2026

Frontier AI pre-training increasingly relies on mixture of experts architectures, which lower compute per token while introducing severe all-to-all communication bottlenecks. To address these scaling limits, the NVIDIA GB300 NVL72 rack-scale system co-designs Blackwell Ultra GPUs, fifth-generation NVLink scale-up fabrics, and 800 Gbps SuperNIC scale-out networking. Testing on DeepSeek-V3 671B across 256 GPUs achieved a pre-training benchmark of 1,648 TFLOPs per GPU using Megatron Core. In addition to hardware co-design, ongoing software optimizations across Megatron Core, TorchTitan, and JAX contributed major throughput gains over time. Scaling from 256 to 1,024 GPUs sustained over 97% per-GPU performance efficiency across all evaluated frameworks by overlapping scale-out gradient traffic behind compute windows.


### [Inside NVIDIA Rubin GPU Architecture: Powering the Era of Agentic AI](https://yomu.fyi/post/inside-nvidia-rubin-gpu-architecture-powering-the-era-of-agentic-ai.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Eduardo Alvarez
- Published: Jul 21, 2026

Agentic artificial intelligence workloads require sustained multistep inference, demanding low per-step latency, high decode throughput, and efficient long-context processing. NVIDIA designed the Rubin GPU to deliver up to ten times more agentic throughput per unit of energy than Blackwell. The hardware combines 336 billion transistors across two dies unified by NV-HBI, up to 288 GB of HBM4 memory providing 22 TB/s peak bandwidth, and the third-generation Transformer Engine reaching up to 50 petaflops of NVFP4 compute. Performance optimizations include inline descriptor updates for the Tensor Memory Accelerator, doubled K-dimension instruction throughput, 3-bit lookup-table weights, and structured 2:4 sparse attention compression. At the rack level, Vera Rubin NVL72 leverages Intelligent Power Smoothing and DSX MaxLPS to enable up to 40% more GPUs within a fixed power budget.


### [NVIDIA Vera CPU: Olympus Cores Built for Maximum Single-Thread Performance in Agentic AI](https://yomu.fyi/post/nvidia-vera-cpu-olympus-cores-built-for-maximum-single-thread-performa.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Praveen Menon
- Published: Jul 21, 2026

Agentic AI workloads shift critical execution paths onto CPUs through sandboxed environments that execute code, invoke tools, and manage runtime states. The NVIDIA Vera CPU addresses these compute requirements via Olympus cores built to maximize single-thread performance and instructions per cycle under full socket load. To handle irregular control flows and pointer-heavy structures, Olympus combines a ten-wide decode engine, neural branch prediction supporting two taken branches per cycle, dependency-breaking acceleration, and dedicated graph prefetchers. Across scale-up systems, dual-socket Vera configurations leverage second-generation NVLink-C2C interconnects to maintain a clean two-NUMA-node topology alongside PCIe 6.4, CXL 3.1, and Arm CCA confidential computing. These architectural choices provide predictable latency and memory bandwidth across highly concurrent reinforcement learning and agent loops.


### [NVIDIA NVLink: The Scale-Up Network for AI Factories](https://yomu.fyi/post/nvidia-nvlink-the-scale-up-network-for-ai-factories.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Elizabeth Goodman
- Published: Jul 20, 2026

Scale-up networking has emerged as a critical architectural component for AI factories supporting trillion-parameter models, mixture-of-experts architectures, and disaggregated serving. NVIDIA presents its sixth-generation NVLink scale-up fabric and NVLink 6 Switch to address latency-sensitive all-to-all GPU communication and offload collective operations. In simulation benchmarks on models like DeepSeek-R1, Qwen 235B, and a simulated 2T parameter model, NVLink achieved up to 2.3X higher decode throughput than off-the-shelf Ethernet in a 72-accelerator domain. The architecture integrates NVLink-C2C to supply 1.8 TB/s of coherent CPU-GPU bandwidth in the Vera Rubin NVL72 platform, as well as NVLink Fusion for integrating semi-custom silicon XPUs. Through co-designed hardware, SHARP in-network compute, and NCCL libraries, the platform optimizes token throughput, factory uptime, and deployment economics.


### [Integrate NVIDIA Omniverse RTX Sensor Simulation Into Existing Apps](https://yomu.fyi/post/integrate-nvidia-omniverse-rtx-sensor-simulation-into-existing-apps.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Tanya Lenz
- Published: Jul 20, 2026

NVIDIA Omniverse libraries, included in NVIDIA Agent Toolkit, provide modular components for incorporating physical AI features into current tools and services. As part of this stack, the ovrtx prerelease library offers a lightweight C and Python SDK for real-time RTX sensor simulation and visualization using OpenUSD scenes. Host applications retain architectural and workflow control by stepping the renderer directly from their internal loops. Integration relies on ovstage for shared OpenUSD data management alongside RenderProducts and RenderVars to configure camera, lidar, radar, and semantic segmentation outputs. PTC Onshape Render Studio is exploring ovrtx to embed RTX rendering directly into cloud-native CAD and PDM workflows.


### [Q&A: How Capcom Brought Path Tracing to RE ENGINE Across PRAGMATA and Resident Evil Requiem](https://yomu.fyi/post/q-a-how-capcom-brought-path-tracing-to-re-engine-across-pragmata-and-r.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Michelle Horton
- Published: Jul 16, 2026

Capcom integrated path tracing into RE ENGINE across PRAGMATA and Resident Evil Requiem to deliver unified indirect and direct lighting. Over two years, the team built a reference path tracer validated against standard DCC tools, scaling it down into a real-time version optimized for NVIDIA DLSS Ray Reconstruction denoising. To manage rendering performance, Capcom avoided expensive AlphaTest texture lookups by creating a ScreenSpaceAlphaTest method comparing ray-hit positions against screen-space depth. Sampling noise in emissive and indoor regions is mitigated using Next Event Estimation and a custom implementation of ReSTIR GI. Replacing traditional shadow maps with continuous path tracing reduced the visual gap between gameplay and cinematics while enabling real-time light transmission through strand hair.


### [Integrating Context-Aware Video AI Agents Into Enterprise Workflows](https://yomu.fyi/post/integrating-context-aware-video-ai-agents-into-enterprise-workflows.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Tanya Lenz
- Published: Jul 16, 2026

Video analytics AI agents often struggle to integrate into enterprise workflows because video platforms, organizational knowledge bases, and operational systems are isolated. To resolve this, NVIDIA NemoClaw orchestrates the Metropolis Video Search and Summarization blueprint alongside the Retrieval-Augmented Generation blueprint into an automated pipeline. Upfront human-in-the-loop interactions collect analysis parameters, objects of interest, and relevant retrieval queries before video ingestion begins. The system combines hierarchical video summaries with contextual enterprise reference documents to generate structured reports with timestamps and citations. Finally, NemoClaw executes programmatic downstream tasks, such as creating prioritized Jira tickets or dispatching industrial maintenance work orders directly into management tools.


### [Scaling Agentic AI Factories Through Extreme Co-Design with NVIDIA BlueField](https://yomu.fyi/post/scaling-agentic-ai-factories-through-extreme-co-design-with-nvidia-blu.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Michelle Horton
- Published: Jul 16, 2026

Agentic artificial intelligence workflows transform data center infrastructure by turning context management, security enforcement, and inter-service communication into active components of the inference data path. To prevent host central processing units and graphics processing units from stalling on these tasks, NVIDIA introduces BlueField-4 data processing units, Vera BlueField-4 STX storage processors, and the DOCA software platform. The BlueField-4 processor offloads Layer 3 routing, encryption, and telemetry using a sixty-four-core Grace processor with up to eight hundred gigabits per second connectivity. Simultaneously, the Vera BlueField-4 STX powers the NVIDIA CMX context memory platform alongside DOCA Memos to store, protect, and share key-value cache across flash storage tiers. This co-designed infrastructure isolates tenant traffic and accelerates context reuse without degrading host-side agent execution.


### [Build a Multi-Camera 3D Tracking Application with NVIDIA DeepStream 9.1 Skills](https://yomu.fyi/post/build-a-multi-camera-3d-tracking-application-with-nvidia-deepstream-9.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Elizabeth Goodman
- Published: Jul 15, 2026

NVIDIA DeepStream 9.1 introduces AutoMagicCalib and Multi-View 3D Tracking skills to resolve the limitations of single-camera 2D tracking and manual camera calibration in large-scale video analytics. Multi-View 3D Tracking projects detections into a shared 3D coordinate system, matching tracklets across cameras via MQTT and maintaining globally consistent object IDs. AutoMagicCalib automates camera intrinsic and extrinsic parameter estimation by analyzing object trajectories across video feeds, optionally using a Visual Geometry Grounded Transformer. These capabilities are integrated into 13 agentic skills that allow coding agents to set up, configure, and execute end-to-end vision AI pipelines from natural language prompts. Outputs include an on-screen display grid, bird's-eye view trajectories, and per-frame protobuf metadata streamed through Kafka.


### [Develop Lightweight USD Runtimes Faster with AI Agents](https://yomu.fyi/post/develop-lightweight-usd-runtimes-faster-with-ai-agents.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Michelle Horton
- Published: Jul 15, 2026

Building custom Universal Scene Description (USD) implementations traditionally required adapting large existing codebases to meet specific memory footprints, application binary interfaces (ABIs), or performance requirements. The nanousd-labs project introduces an alternative approach by using AI agents to generate lightweight USD runtimes directly from the Alliance for OpenUSD machine-readable USD Core Specification. Agents parse the specification section by section, write conforming code, and validate output against specification-derived tests under engineer guidance. Written in C++ with a public C API, nanousd functions as an independent data layer that handles parsing, composition, queries, and writing without rendering pixels. This methodology enables developers to regenerate runtimes for varying deployment constraints while maintaining standard compliance through reusable workflows and skill graphs.


### [Building Faster Cryptography with Carryless Multiplication in NVIDIA CUDA 13.3](https://yomu.fyi/post/building-faster-cryptography-with-carryless-multiplication-in-nvidia-c.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Michelle Horton
- Published: Jul 15, 2026

NVIDIA CUDA 13.3 introduces clmad, a native PTX carryless multiply-accumulate instruction for Ampere and newer GPU architectures. Prior to this release, GPUs lacked dedicated hardware for carryless multiplication, requiring developers to emulate binary extension field arithmetic with ALU operations or bitsliced circuits. The new primitive performs 64-bit by 64-bit carryless multiplication into 128-bit results with accumulation, allowing full 128-bit field multiplications via Karatsuba in six instructions. Benchmarks demonstrate that clmad achieves up to 6.3 TB/s throughput for GHASH on the NVIDIA B200, representing an 18.8x improvement over bitslicing. Additionally, sum-check protocol latency in zero-knowledge proving workloads decreases by up to 13x on the B200 and 4x on the RTX 5090.


### [Lessons From the Leaderboard: What 5,000+ Kagglers Taught Us About Improving AI Reasoning](https://yomu.fyi/post/lessons-from-the-leaderboard-what-5-000-kagglers-taught-us-about-impro.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Elizabeth Goodman
- Published: Jul 14, 2026

The NVIDIA Nemotron Model Reasoning Challenge on Kaggle tasked over 5,000 participants with improving reasoning accuracy on Nemotron-3-Nano-30B using restricted LoRA adapters on Google Cloud G4 VMs. Top-performing competitors approached reasoning as an end-to-end engineering workflow by auditing synthetic chain-of-thought traces with programmatic solvers before training. Successful teams also compressed reasoning representations into compact signatures and bit-manipulation formats to prevent long chains from exceeding runtime token generation limits. Additionally, leading approaches separated precomputed reusable structures from live computation and conducted granular per-category validation to monitor regression and non-determinism. These results show that reasoning improvements stem from verifiable training data, compact context encoding, and structured validation rather than unconstrained data scaling.


### [How to Run an Autoresearch Workflow with RL Agent Skills and NVIDIA NeMo](https://yomu.fyi/post/how-to-run-an-autoresearch-workflow-with-rl-agent-skills-and-nvidia-ne.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Tanya Lenz
- Published: Jul 14, 2026

Setting up reinforcement learning workflows and running repetitive experimentation often consumes significant engineering time before meaningful metrics emerge. To address this, an autonomous autoresearch workflow uses a frontier coding agent running Codex with GPT 5.5 to manage NVIDIA NeMo RL and NeMo Gym on an NVIDIA Brev GPU instance. The agent executes full-stack setup, creates a novel NeMo Gym visual counting environment, tunes Qwen3-VL-2B-Instruct accuracy from 25.0% to 96.9%, and implements an off-policy reinforcement learning algorithm directly from a research paper. Reusable skills, including brev-etiquette, session-memory, and autoresearch, enforce local conventions and prevent context drift during long executions. This setup offloads environment configuration, dependency resolution, and experiment tracking while preserving human oversight for goals and strategy.


### [Post-Train NVIDIA Cosmos 3 in One Day Using Agent Skills](https://yomu.fyi/post/post-train-nvidia-cosmos-3-in-one-day-using-agent-skills.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Tanya Lenz
- Published: Jul 14, 2026

Adapting vision reasoning models for specialized physical AI video tasks often demands days of manual container configuration, training script authoring, and hyperparameter tuning. NVIDIA Cosmos 3 Nano, an omnimodal mixture-of-transformers model, pairs an autoregressive Reasoner tower with an iterative diffusion Generator tower for video question answering. By integrating NVIDIA TAO agent skills with a coding agent like Codex, developers can automate data patching, evaluation, and Low-Rank Adaptation (LoRA) post-training. In experiments using the Woven Traffic Safety dataset, LoRA fine-tuning boosted zero-shot baseline accuracy from 54.41% to 87.14% while using approximately seven times fewer GPU hours than full-parameter supervised fine-tuning. Combining this agent workflow with TAO AutoML further elevated model accuracy to 93.35% before automated deployment via NVIDIA NIM.


### [NVIDIA Ising Decoding Cuts Color Code Logical Error Rates by Over 300x](https://yomu.fyi/post/nvidia-ising-decoding-cuts-color-code-logical-error-rates-by-over-300x.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Elizabeth Goodman
- Published: Jul 13, 2026

Fault-tolerant quantum computing requires effective quantum error correction, but color codes have historically been constrained by difficult decoding demands. NVIDIA introduced the Ising Decoder ColorCode 1 Fast, a pre-decoder designed to accelerate and improve color code logical error rates. The framework uses a 3D Convolutional Neural Network trained via cuStabilizer in NVIDIA cuQuantum alongside PyTorch to handle localized error syndromes. In benchmark testing at code distance d=31 with a 0.3% physical error rate, the decoder achieved over 347.7x lower logical error rates and 7.3x faster runtime compared to the Chromobius decoder. These local, space-time predictions scale to arbitrary distances, supporting parallel blockwise decoding for real-time quantum algorithm execution.


### [Extreme Event Likelihoods with Guided Generative Models](https://yomu.fyi/post/extreme-event-likelihoods-with-guided-generative-models.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Elizabeth Goodman
- Published: Jul 13, 2026

Estimating the likelihood of extreme, high-impact events using brute-force Monte Carlo simulations requires excessive model iterations for expensive physics-based climate models. While guided diffusion models steer generation toward rare events like tropical cyclones, oversampling distorts the true probability distribution. To address this, researchers guide the diffusion-based climate emulator NVIDIA cBottle toward specific events and compute log-odds ratios between guided and unguided distributions. Reweighting the guided samples via these odds ratios enables importance sampling under the original climate distribution. Implemented in NVIDIA Earth2Studio, this technique reduced standard error by 25% compared to simple Monte Carlo sampling when evaluating tropical cyclone states.


### [How to Evaluate General-Purpose Robot Policies for Real-World Deployment](https://yomu.fyi/post/how-to-evaluate-general-purpose-robot-policies-for-real-world-deployme.md)
- Company: [NVIDIA Developer Blog](https://yomu.fyi/company/nvidia-developer-blog.md)
- Author: Brad Nemire
- Published: Jul 12, 2026

Evaluating robotics foundation models accurately in simulation remains challenging due to visual domain overlap, benchmark saturation, diagnostic gaps, and small sample sizes. RoboLab addresses these deficiencies by providing a robot-agnostic simulation platform that supports rapid task creation and diagnostic evaluation suites. Tasks in RoboLab can be compiled across varying robot embodiments and target visual, procedural, and relational competencies. Statistical analysis using the Clopper-Pearson method reveals that narrowing the confidence interval around a 90 percent success rate from ten to two percentage points demands increasing rollouts from 70 to 1,030. Developed by NVIDIA Research, RoboLab powers the open-source Isaac Lab-Arena simulation framework to establish scalable evaluation for real-world robotic policies.


[Older posts](https://yomu.fyi/company/nvidia-developer-blog/page/2.md)