---
title: "Compiler"
description: "2 posts about Compiler, summarised, each linking to the original."
---

# Compiler
> 2 posts about Compiler, summarised, each linking to the original.

## Articles

### [Introducing tsrs: a Port of TypeScript to Rust](https://yomu.fyi/post/introducing-tsrs-a-port-of-typescript-to-rust.md)
- Company: [Cloudflare](https://yomu.fyi/company/cloudflare.md)
- Author: Christoph Nakazawa
- Published: Oct 20, 2026
- Type: Announcement

Cloudflare announced tsrs, a Rust port of the TypeScript compiler built within the Oxc toolchain in collaboration with VoidZero, Owner.com’s Max Schwenk, and the TypeScript team. Early benchmarks validated with the TypeScript team show tsrs up to 8x faster and using 70% less memory than TypeScript 7.0 with the same number of type-check workers, and an even faster adaptive default configuration. The project is not a fork; the TypeScript team retains full authority over language design, and tsrs maintains strict behavioral compatibility via a nightly automated process that reviews upstream diffs and runs the TypeScript test suite. Rust’s memory model, lacking a garbage collector, enables efficient WebAssembly execution, allowing TypeScript environments to run in browsers or Cloudflare Workers without heavy overhead. Future plans include merging with tsc-rs for complete LSP support, adding type-aware lint rules to Oxlint, and contributing performance improvements back to TypeScript’s Go codebase.


### [Bringing Visual Graph Debugging to Custom Edge Compilers with Model Explorer](https://yomu.fyi/post/bringing-visual-graph-debugging-to-custom-edge-compilers-with-model-ex.md)
- Company: [Google](https://yomu.fyi/company/google.md)
- Author: Eric Yang, Alan Ma
- Published: Oct 20, 2026
- Type: Tutorial

Machine learning models require compilation steps such as quantization, graph lowering, operator fusion, and hardware delegation when deployed to edge devices. During deployment, engineers must verify structural integrity, full accelerator delegation, and cycle-level performance bottlenecks. Arm built open-source adapters for Google AI Edge Model Explorer to visualize Arm-specific intermediate representations including VGF and TOSA. Inspecting a VGF graph of a PyTorch Neural Super Sampling model uncovered unintended TRANSPOSE operators introduced by a backend change. For an Ultralytics YOLO model, split-pane view confirmed complete NPU delegation without CPU fallback, and per-node cycle-accurate tracing with color-coded heatmaps identified a single TRANSPOSE node as the primary latency bottleneck.