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NVIDIA Developer Blog
Technology company that designs powerful computer chips used for video games, data centers, and artificial intelligence.
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Synthetic Data Generation for Financial AI Research with NVIDIA NeMo
Real-world financial natural language processing datasets often overrepresent common events like earnings while underrepresenting rarer occurrences such as credit-rating changes. To address this imbalance, an iterative generation pipeline produced over 500,000 unique headlines across 13 categories using NVIDIA NeMo Data Designer, NeMo Curator, and Nemotron 3 Nano. Instead of relying on a single large batch that yielded 65 percent near-duplicates, the workflow executes iterative cycles of category-weighted generation, rule-based filtering, global semantic deduplication, and dynamic category reweighting. Farthest-from-centroid few-shot example selection guided subsequent rounds toward novel semantic spaces across 82 total iterations. Executed over approximately six days on an eight-way NVIDIA B200 node, the resulting corpus enabled fine-tuning compact student language models to achieve 95 percent of teacher model performance.
Elizabeth GoodmanA Practical Guide to GPU-Initiated Communication for Molecular Dynamics at Scale
Molecular dynamics packages like GROMACS face severe scaling bottlenecks when CPU-orchestrated MPI communication introduces blocking synchronizations during halo exchanges. To resolve this, researchers implemented GPU-initiated communication using NVIDIA NVSHMEM to eliminate CPU-GPU handoffs. The redesigned approach fuses packing, remote memory access, and completion waiting into device-side kernels using fine-grained signaling. Benchmarks on NVIDIA DGX H100 systems demonstrated up to 1.5x performance gains intra-node and up to 2x on GB200 NVL72 multi-node clusters, particularly on latency-bound systems. While device-initiated communication introduces a slight 1–3% overhead on very large compute-bound configurations at low node counts, it consistently improves strong scaling for production workloads.
Michelle HortonRunning Low-Latency Analytical Workloads with GPU-Accelerated Presto on NVIDIA GB200 NVL72
GPU-accelerated Presto integrates NVIDIA cuDF algorithms and NVLink to deliver low-latency analytical query execution on massive datasets. Benchmarks derived from TPC-H across scale factors 1K and 3K reveal that a single NVIDIA DGX B200 system with eight GPUs outperforms 8- to 10-node Intel Xeon clusters by up to 8.2x. Scaling out across multinode NVIDIA GB200 NVL72 systems paired with IBM Storage Scale achieved additional performance gains. Enabling NVIDIA GPUDirect Storage, tuning I/O parameters, adjusting thread counts, and applying query rebatching delivered a cumulative 64% reduction in query runtimes. Topology-aware GPUDirect Storage cold reads proved roughly twice as fast as standard POSIX reads by avoiding CPU memory staging and NUMA boundary crossing penalties.
Tanya LenzNVIDIA Vera CPU Boosts AI Factory Throughput to Accelerate Agentic Workloads
Agentic AI workflows and reinforcement learning rely heavily on sequential CPU tasks, such as tool calls, sandboxed code execution, data processing, and environment rollouts between GPU steps. When CPU performance degrades under full socket load, training time inflates, serving latency grows, and GPU KV-caches face eviction. The NVIDIA Vera CPU addresses these bottlenecks by featuring 88 Olympus cores on a monolithic compute die, paired with power-efficient LPDDR5x memory and the Scalable Coherency Fabric. These cores incorporate a neural branch predictor, a 10-wide decode front end, deep out-of-order execution, and NVIDIA Spatial Multithreading. Consequently, Vera achieves 1.8x faster core execution, 40% lower peak loaded latency compared to x86 CPUs, and up to 1.2 TB/s total memory bandwidth, preventing costly KV-cache recomputations.
Michelle HortonDevelop Humanoid Robot Policies End-to-End with NVIDIA Isaac GR00T
Humanoid robotics development suffers from fragmented tooling, siloed software ecosystems, and incompatible data formats that hinder reproducible workflows. NVIDIA introduced the Isaac GR00T Development Platform, an open-source, modular humanoid development environment that connects simulation setup, demonstration capture, policy training, evaluation, and hardware deployment. Central to this platform is the Isaac GR00T 1.7 vision-language-action model, which features a 3-billion-parameter base checkpoint licensed under Apache 2.0. The architecture adopts a Cosmos-Reason2-2B backbone and supports full pipeline export to ONNX and TensorRT for deployment on Jetson Thor. In a reference pick-and-place manipulation task, developers capture teleoperated demonstrations with Isaac Teleop, convert trajectories into LeRobot format, post-train GR00T 1.7, and evaluate the closed-loop policy inside Isaac Lab-Arena.
Elizabeth GoodmanMaximize Spectral Efficiency with AI-Native RAN and NVIDIA AI Aerial
Massive MIMO deployments often fail to achieve theoretical spectral efficiency because CPU compute constraints force algorithmic compromises in user tracking, interference mitigation, and pairing. NVIDIA AI Aerial addresses this gap using a GPU-accelerated, AI-native radio access network architecture. This approach enables dense mathematical models across Layer 1 and Layer 2 workloads, including machine-learning beamforming and deep reinforcement learning link adaptation. In 64T64R simulations, AI beamforming achieved up to 1.62x higher throughput at 32 layers compared to regularized Zero Forcing baselines. The platform also unifies physical and MAC layer coordination while allowing dynamic allocation of spare GPU compute to edge AI inference.
Michelle HortonEnhancing Goodput in Large-Scale LLM Training with Nonuniform Tensor Parallelism
Large-scale LLM training jobs spanning thousands of GPUs frequently encounter transient hardware interruptions that bottleneck tightly coupled tensor parallel groups. Nonuniform Tensor Parallelism addresses this bottleneck by dynamically adapting the tensor parallelism degree within affected scale-up domains rather than dropping entire data replicas. When a GPU drops out, the system reconfigures the remaining functional devices to process larger shards and resumes execution from the latest checkpoint. To prevent the downsized replica from stalling global synchronization, advanced rack designs temporarily power-boost the active GPUs to increase clock frequencies and match baseline throughput. Overlapping the necessary tensor resharding with backward computation and parameter synchronization reduces overhead on healthy replicas to under one percent.
Michelle HortonHardware-Rooted AI Security That Won’t Slow You Down
NVIDIA Confidential Computing secures enterprise data, proprietary model weights, and the model itself during active AI inference. The architecture integrates silicon-level private signing keys fused during manufacturing, encrypted multi-GPU NVLink, and remote attestation through the NVIDIA Remote Attestation Service alongside CPU Trusted Execution Environments. To mitigate overhead from secure work submission latency and encrypted host-to-device transfers, software optimizations incorporate CC-safe autotuner timing in FlashInfer, asynchronous copy workers in SGLang, and piecewise CUDA graph replay. Benchmarks on an HGX B300 system running the Qwen 3.5 397B-A17B model at FP8 precision show inference performance reaches up to 98% of non-confidential baselines across tested concurrency levels.
Elizabeth GoodmanMastering Agentic Techniques: AI Agent Reinforcement Learning
Language model agents often fail across long-horizon workflows, repeat tool-call errors, and output invalid schemas when relying solely on prompting or retrieval. Reinforcement learning with verifiable rewards provides a practical training signal for domain-specific tasks by scoring model rollouts against deterministic verifiers such as schema checkers, unit tests, and execution sandboxes. Teams can implement group relative policy optimization to sample multiple trajectories per prompt and update policy weights based on relative performance within the group. Establishing environments with explicit harness, state, and verifier definitions allows agents to learn multi-step tool use, whereas static datasets fail to capture sequential dependencies. Inspecting checkpoint rollouts and testing against held-out tasks prevents reward hacking while continuously turning operational failures into verifiable benchmark environments.
Elizabeth GoodmanDesigning GPU-Accelerated Query Engines with NVIDIA GQE
GPU-accelerated query engines encounter performance constraints stemming from memory and I/O bandwidth limitations. NVIDIA introduces GQE, a reference architecture using NVIDIA cuDF, nvCOMP, and other CUDA-X libraries to accelerate SQL query execution across modern hardware like the NVIDIA GB200 NVL4. The architecture coordinates three distinct layers: a query layer consuming Substrait plans, a data layer managing in-memory table transfers, and an execution layer executing relational operator task graphs. GQE employs pipeline parallelism, partition pruning, hybrid compression, and batched asynchronous transfers to overlap data movement with GPU compute. On a non-standard 1 TB TPC-H benchmark, GQE on a single B200 GPU achieved a 7.5x total execution time speedup over dual-socket CPU configurations running DuckDB.
Michelle HortonOptimizing a Neural Reconstruction Pipeline Using NVIDIA Nsight Developer Tools
NVIDIA Omniverse NuRec reconstructs dynamic 3D environments from camera and lidar sensor data for autonomous vehicle simulation workflows, but high computational demands historically caused long reconstruction times. Engineers used NVIDIA Nsight Systems and Nsight Compute to systematically profile the PyTorch-based training pipeline and optimize its underlying CUDA kernels. Nsight Systems revealed GPU underutilization caused by numerous small kernels and blocking synchronization calls, leading to a fused interpolate kernel that accelerated execution from 4.184 milliseconds to 83.81 microseconds. Profiling with Nsight Compute uncovered resource mismatch in the renderBackward kernel, prompting the team to split it into dedicated camera and lidar implementations with tuned register and shared memory allocations. These adjustments raised kernel occupancy from approximately 15% to between 30% and 50% while decreasing the longest lidar kernel runtime from 31 milliseconds to 18 milliseconds.
Tanya LenzHow to Govern Autonomous Agents in Enterprise AI Factories
Autonomous AI agents require governed environments to safely inspect code, execute tests, query enterprise systems, and handle sensitive business data. The NVIDIA Secure Agent Workspace Reference Design shifts agent execution away from user laptops to dedicated, single-user virtual machines managed on Red Hat OpenShift Virtualization or Microsoft Azure. Perimeter defenses enforce enterprise single sign-on access broker connections, default-deny network egress rules, and human approval gates for critical state-changing actions. Inside the workspace virtual machine, active sandboxing through NVIDIA OpenShell evaluates signed security policies before each tool invocation while credential proxies prevent direct access to raw secrets. GitOps workflows continuously reconcile infrastructure profiles and network configurations while all operational and security telemetry streams to centralized SIEM platforms in OCSF format.
Michelle HortonCreating the NVIDIA Nemotron 3 Ultra NVFP4 Checkpoint with NVIDIA Model Optimizer
Moving large model weights efficiently requires quantization, but mapping weights to NVFP4's eight positive values risks severe precision loss or outlier-induced underflow. To address this, NVIDIA quantized the 550B Nemotron 3 Ultra model using NVIDIA Model Optimizer with a multi-precision strategy rather than quantizing all layers uniformly. The recipe applies four-over-six adaptive block scaling to Mixture of Experts routed weights, while assigning FP8 to shared experts and retaining BF16 for sensitive attention linears and embeddings. This process reduced the checkpoint size from 1,121 GB down to 352.3 GB and enabled single-checkpoint execution across Hopper using W4A16 and Blackwell using native W4A4. As a result, the model achieves up to 5.9x higher inference throughput than the GLM-5.1 754B FP4 model on decode-heavy workloads while matching BF16 benchmark accuracy.
Michelle HortonStreamlining Resource Binding with End-to-End Support for Vulkan Descriptor Heaps
Vulkan introduces the VK_EXT_descriptor_heap extension to refactor GPU resource binding, replacing set-based layouts and pool allocations with application-managed descriptor memory heaps. This approach aligns Vulkan closer to Direct3D 12 and benefits workloads like dynamic texture indexing and complex ray tracing shaders. Developers manage memory directly, binding a single resource heap and a separate sampler heap globally to avoid high rebinding overhead. Shaders can access descriptors either through mapping structures using constant offsets or push constants, or directly via untyped pointers enabled by VK_KHR_shader_untyped_pointers. Support is integrated into NVIDIA drivers 610, Vulkan Headers 1.4.340, and Nsight Graphics 2026.2 for frame capture and inspection.
Tanya LenzQ&A: How KRAFTON Built PUBG Ally, a Co-Playable Character Powered by NVIDIA ACE
KRAFTON developed PUBG Ally, an on-device AI co-playable character for PUBG: BATTLEGROUNDS, using NVIDIA ACE tooling and models. Conventional non-playable characters rely on fixed dialogue, but PUBG Ally processes live game states and player voice input in real time. The interactive pipeline combines automatic speech recognition, a quantized Mistral-NeMo-Minitron-2B small language model, and a custom text-to-speech model running locally on client GPUs with at least 8GB of VRAM. To minimize latency, the architecture separates reactive gameplay into a behavior-tree System 1 layer while routing strategic decisions and speech generation to the language model. KRAFTON tuned the non-deterministic system across multi-layer evaluations and large-scale playtests with over a thousand players.
Elizabeth GoodmanAccelerating BEV Pooling on NVIDIA GPUs for Physical AI Applications
Bird's-eye-view (BEV) pooling frequently becomes an inference latency bottleneck in spatial AI pipelines due to irregular memory access patterns and scatter-reduce operations. BEVPoolV3 addresses this by tailoring kernel execution to the GPU memory regime, specifically distinguishing between DRAM-bound and L2-cache-resident working sets. The implementation reduces redundant scatter traffic via depth-outer traversal, precomputes indices to eliminate runtime integer division, minimizes duplicate depth loads, and adopts interval-owned writes to bypass atomic operations. On a canonical 49 MB nuScenes working set, BEVPoolV3 accelerates TensorRT plugin execution from 274.0 µs down to 16.4 µs on an NVIDIA RTX PRO 6000 Blackwell Max-Q GPU. Furthermore, profiling with Nsight Compute reveals that L2-resident scatter-reduce operators achieve optimal efficiency with FP8, avoiding the ALU instruction overhead of NVFP4 decoding.
John YangMaximize AI Factory Energy Efficiency Through Full-Stack Inference and Training Optimizations
Power costs comprise up to 40% of AI factory operating expenses, making performance per watt critical within fixed site power limits. Operators maximize throughput by combining architectural enhancements, narrow-precision formats like NVFP4, and mixture-of-experts model designs that activate fewer parameters per token. During distributed LLM training in Megatron-LM, tuning individual GPU speeds along critical execution paths eliminates idle power waste without extending total training time. Additionally, the NVIDIA DSX platform orchestrates dynamic power allocation, 45°C direct-to-chip liquid cooling, and grid integration across racks and facilities. Together, these full-stack optimizations enable performance-optimized AI factories to deliver up to 2.6 times more tokens per second per megawatt.
Sachin IdgunjiBoost Inference Performance up to 15x on NVIDIA Blackwell Using DFlash Speculative Decoding
Sequential token generation in autoregressive LLMs limits GPU utilization and serving throughput, while conventional speculative decoding remains constrained by autoregressive draft models. DFlash addresses this bottleneck by employing a lightweight block-diffusion drafter that predicts an entire block of masked candidate tokens in a single forward pass. The architecture incorporates target hidden-state conditioning and key-value injection into draft model projections while relying on the target model for parallel verification. Evaluated on NVIDIA Blackwell GPUs across TensorRT-LLM, vLLM, and SGLang, DFlash increases gpt-oss-120b throughput by more than 15x at high interactivity targets and delivers up to 5.8x speedups on Gemma 4 31B compared to autoregressive decoding.
Amr ElmeleegyBuild an AI Scientist for Life Science Discovery with NVIDIA BioNeMo Agent Toolkit
General-purpose AI agents often struggle with biomolecular discovery because scientific workflows require precise model selection, strict input formatting, and artifact interpretation. The NVIDIA BioNeMo Agent Toolkit bridges this gap by providing BioNeMo Skills and Model Context Protocol wrappers on top of accelerated NVIDIA NIM microservices. These skills instruct agents on tool capabilities, required inputs, expected file formats like CIF and SMILES, and specific failure modes. Developers can route requests through hosted endpoints for testing or deploy local NIM microservices on GPU nodes to lower warm per-call latency during iterative candidate generation loops. Internal benchmarks using Codex CLI demonstrate that equipping agents with BioNeMo Skills improves task completion rates from 57.1% to 100% while doubling token efficiency across passing assertions.
Kyle TretinaHow Telcos Build Autonomous Networks with Agentic AI
Telecom operators currently operate mostly within Levels 2 and 3 of the TM Forum autonomous networks taxonomy, relying on predefined scripts. Progressing to Levels 4 and 5 demands autonomous systems capable of intent comprehension, real-time telemetry sensing, and cross-domain action coordination. To address this, an autonomy platform architecture combines domain-specific reasoning models, agent harnesses, and isolated sandboxed runtimes. Workflows separate responsibilities among on-demand agents, long-running execution loops, and deep-research multi-agent systems that evaluate ranked remediation paths or design wireless algorithms. Initial experiments in simulated SR-MPLS routing and wireless physical or MAC layer design show autonomous discovery can deliver measurable gains over standard operational and engineering baselines.
Amogh Dendukuri