ARM Is a Stack Decision, Not a CPU Checkbox
An architecture view of ARM deployments, from workload fit and software support to platform choice, showing where performance, memory, storage, and operations shape the decision.
UberExplainer
Uber, Oracle Cloud Infrastructure, and Ampere co-optimized the OCI AmpereOne M A4 instance family after migrating large workloads from on-premises data centers to Arm-based cloud infrastructure. Early A1 and A2 deployments exposed dual-socket latency, Go performance degradation associated with smaller TLB and cache sizes, and insufficient single-thread performance for Gurobi services. Uber shared workload characteristics and targets that informed AmpereOne M silicon and an OCI FlexSKU, while the teams evaluated frequencies, core counts, deployment models, memory ratios, and storage. For latency-sensitive stateless services, the resulting guidance favors higher-frequency CPUs, about 8 GB per vCore, and virtual machines; throughput-oriented storage systems use parallelism, flexible memory-to-core ratios, and local NVMe or remote block storage according to locality. The collaboration is presented as improving price-performance and supporting energy-efficient, cost-optimized multi-architecture computing at scale.
Uber was moving massive workloads from on-premises data centers to cloud infrastructure while introducing Arm-based compute into an environment dominated by x86. Early OCI Ampere A1 and A2 deployments revealed issues involving cross-socket communication, Go memory management and performance, and single-threaded workloads that could not be addressed through horizontal scaling alone.
Uber, Oracle Cloud Infrastructure, and Ampere used production workload characteristics and performance targets to co-optimize the A4 instance family from silicon through system configuration. They evaluated high-frequency Flex SKUs, bare-metal and virtual-machine deployments, core counts, memory-to-core ratios, DDR5 memory, and local NVMe versus remote block storage, with configurations selected for latency-sensitive or throughput-oriented workloads.
Dual-socket systems reduced performance for latency-sensitive operations because of cross-socket link bandwidth; Ampere’s high core counts per socket removed the need for multi-socket servers.
Uber associated Go performance degradation and GOMEMLIMIT-related out-of-memory errors mainly with smaller TLB and cache sizes, which caused more page faults and slower garbage collection.
A4 workload guidance separates latency-sensitive stateless services from throughput-oriented storage systems, matching higher frequency and predictable memory behavior to the former and flexible parallel storage configurations to the latter.
Summaries are generated from the original by a language model. Check the original before relying on it.
See the idea
An architecture view of ARM deployments, from workload fit and software support to platform choice, showing where performance, memory, storage, and operations shape the decision.
Keep reading
The Good Stuff
Paid picks we use ourselves. Links carry a referral code — a subscription through one earns us a commission at no extra cost to you.
One useful email. Unsubscribe anytime.